Brightness adjustment of a video signal in a TV receiver or the like is performed by adding/subtracting an offset signal to/from the video signal.
FIG. 7 is a block diagram illustrating the construction of a conventional signal processor.
In FIG. 7, the conventional signal processor comprises an N-bit adder 1003 and a controller 1004.
The N-bit adder 1003 adds an N-bit video signal S1001 inputted to a video signal input terminal 1001 and an N-bit brightness control signal S1002 inputted to a brightness control signal input terminal 1002, and outputs the addition result from an output 1003D as an N-bit signal S1003. When overflow occurs, the N-bit adder 1003 outputs an overflown 1-bit signal, that is, a signal of the most significant bit of the N+1 bits as the addition result, from a carry output 1003E as a carry output signal S1004, and outputs a signal of the lower N bits from the output 1003D as the N-bit signal S1003. Here, a carry input 1003C of the N-bit adder 1003 is grounded.
The controller 1004 receives the carry output signal S1004 and the N-bit signal S1003 from the N-bit adder 1003 as input, controls the signals from the N-bit adder 1003 so that they are equal to or smaller than a predetermined upper limit and equal to or larger than a predetermined lower limit, and outputs an N-bit signal to a video signal output terminal 1005.
Next, the operation of the conventional signal processor will be described.
The N-bit video signal S1001 is supplied from the video signal input terminal 1001 to one input 1003A of the N-bit adder 1003. The N-bit brightness control signal S1002 is supplied from the brightness control signal input terminal 1002 to the other input 1003B of the N-bit adder 1003. As the result, a signal obtained by adding the brightness control signal S1002 to the video signal S1001 is outputted from the output 1003D and the carry output 1003E of the N-bit adder.
The N-bit signal S1003 and the carry output signal S1004 which are outputted from the N-bit adder 1003 are controlled by the controller 1004 so that they are within a range between predetermined values.
In this way, only an offset-adjusted video signal which is obtained by performing offset adjustment on the video signal S1001 is outputted from the video signal output terminal 1005.
However, in the conventional signal processor as described above, the accuracy of offset adjustment is restricted by the number of bits of the video signal and the brightness control signal. That is, offset adjustment of N-bit accuracy is performed in the conventional signal processor.
Thus, in order to improve the accuracy of brightness adjustment, the number of bits of the video signal and the brightness control signal is required to be increased.
However, when the number of bits is increased, it is required to increase the number of bits not only in the N-bit adder and the controller but also a circuit for processing a signal after offset adjustment, resulting in an increase in circuit scale.
The present invention is made to solve the above-described problems and has for its object to provide a signal processor which is able to improve the accuracy of brightness adjustment without increasing circuit scale.